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1. RISCV-CPU RISCV-CPU Public

   A RISC-V CPU Core (RV32I_Zicsr_Zifencei)

   SystemVerilog 1

2. TrafficController TrafficController Public

   An advanced traffic light control system on FPGA

   Verilog

3. Image-IO-Model Image-IO-Model Public

   SNU AI System Hardware Design Project

   C++

4. 2-Level-libCacheSim 2-Level-libCacheSim Public

   2-Level Cache Simulator

   C

5. DevoChat DevoChat Public

   Unified Web AI Chat UI/Platform & MCP Client

   JavaScript 7 2

6. wyoming-securewakeword wyoming-securewakeword Public

   Wyoming server for a voice-authenticable wakeword

   Python 1