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mem-ruby,configs: honor configurable Ruby link width - #6

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mem-ruby,configs: honor configurable Ruby link width#6
Basemism wants to merge 11 commits into
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staging-basem/ruby-link-width

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@Basemism Basemism commented Sep 2, 2026

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Apply --link-width-bits to SimpleNetwork external and internal links in the crossbar and XY-mesh topologies. Convert the option from bits to the byte-based bandwidth_factor used by SimpleNetwork while retaining the existing 128-bit default.

Also pass the selected width to CrossbarGarnet external links so GPU and CPU topology configurations use the same explicit link-width setting.

v-ramadas and others added 11 commits August 26, 2026 17:31
This commit fixes the instruction execution latency of LDS instructions
based on what microbenchmarks suggest
The LDS uses 4 byte wide banks in most GPUs. This requires each 4B
address to map to a bank. The previous model mapped each byte to a bank
and introduced several bank conflicts. This commit fixes the bank
mapping to map each 4B word to an LDS bank

Change-Id: Iaca0bcd3525a31c4ae55e379bf341a1de3ef8b31
Change-Id: I6dc1c9118027434a9e0bd26cc3843d3f56d955ad
Previously, the LDS model assumed each instruction has the same bus data
transfer costs. This commit updates that to use the instruction dword
length instead

Change-Id: Id3decd6bb6fba3c50c84377ac5c7550660113092
Previously, `GlobalMemPipeline::getNextReadyResp` only checked the
absolute oldest request in the entire ComputeUnit. If this single
request was incomplete, it blocked all subsequent completed requests
from being processed, degrading global memory pipeline performance.

This commit updates the response selection logic to pick the oldest
completed request on a per-wavefront basis.

This prevents a single stalled wavefront from starving the entire CU,
improving overall global memory pipeline throughput.

Change-Id: Ia9bfde40a1940f450aee181ab816cc47dc677644
Introduce separate fabric_clk and memory_clk for the GPUFS,
replacing the single ruby_clock domain.

Change-Id: I817ab2e5a215b76728fd31dcc067535fd6590126
Previously, gpu clock was not applied to the model

Change-Id: Ic3e39f984bc79fc0787282bb73d004a1f474e904
Apply --link-width-bits to SimpleNetwork external and internal links in the
crossbar and XY-mesh topologies. Convert the option from bits to the byte-based
bandwidth_factor used by SimpleNetwork while retaining the existing 128-bit
default.

Also pass the selected width to CrossbarGarnet external links so GPU and CPU
topology configurations use the same explicit link-width setting.
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3 participants