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Refactor: gate Scheduler summary log behind PTO2_SCHED_PROFILING#1225

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ChaoWao merged 1 commit into
hw-native-sys:mainfrom
ChaoWao:docs/scheduler-summary-to-sched-profiling
Jul 1, 2026
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Refactor: gate Scheduler summary log behind PTO2_SCHED_PROFILING#1225
ChaoWao merged 1 commit into
hw-native-sys:mainfrom
ChaoWao:docs/scheduler-summary-to-sched-profiling

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@ChaoWao

@ChaoWao ChaoWao commented Jul 1, 2026

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Summary

Follow-up to #1217. The per-thread Scheduler summary device log was
emitted under plain PTO2_PROFILING=1 (Level 1), while every other
per-thread profiling line (orch_* / sched_* timing) is gated by its
Level 2/3 sub-macro. That made Level 1 the only level producing a
per-thread device log, and left the profiling_levels.md per-level counts
inconsistent (CodeRabbit flagged this on #1217).

This moves Scheduler summary (and the sched_total computation that only
feeds it) into the #if PTO2_SCHED_PROFILING block in
log_l2_swimlane_summary() for both a2a3 and a5. Level 1 now emits no
per-thread device logs — it only feeds the host-side Orch/Sched
[STRACE] windows via aicpu_phase_set_window.

Changes

  • Code (scheduler_cold_path.cpp, a2a3 + a5): gate Scheduler summary
    and sched_total behind PTO2_SCHED_PROFILING; mark cur_thread_completed
    [[maybe_unused]] (now used only inside the SCHED block) to keep the
    Level-1 build clean under -Werror=unused-parameter.
  • Docs (profiling_levels.md, a2a3 + a5): Level 1 documents zero device
    logs; Level 2 gains the Scheduler summary; the stale per-level
    LOG_INFO_V9 count formulas (N_sched*2 + N_orch*1 + 1,
    11 debug + 2 basic + ..., table count 7) are replaced with per-thread
    descriptions matching the actual macro gating.

Testing

  • Default build clean on a2a3 and a5 (no -Werror=unused-variable/parameter)
  • profiling-flags-smoke matrix reproduced locally: pto2-off / orch /
    orch-tensormap / sched / orch-sched / all-on all build on a2a3sim + a5sim
  • dummy_task sim test passes on a2a3sim and a5sim
  • Hardware tests (CI)

The per-thread "Scheduler summary" device log was emitted under plain
PTO2_PROFILING=1 (Level 1), while every other per-thread profiling line
(orch_* / sched_* timing) is gated by its Level 2/3 sub-macro. That made
Level 1 the only level with a per-thread device log and left the
profiling_levels.md counts inconsistent.

Move the `Scheduler summary` line (and the `sched_total` computation that
only feeds it) into the `#if PTO2_SCHED_PROFILING` block in
log_l2_swimlane_summary() for both a2a3 and a5. Level 1 now produces no
per-thread device logs — it only feeds the host-side Orch/Sched [STRACE]
windows via aicpu_phase_set_window. `cur_thread_completed` is now used only
inside the SCHED block, so it is marked [[maybe_unused]] to keep the
Level 1 (PTO2_SCHED_PROFILING=0) build warning-clean under
-Werror=unused-parameter.

Rewrite profiling_levels.md (both arches) accordingly: Level 1 documents
zero device logs; Level 2 gains the Scheduler summary (no longer a
"replaced" line); the stale per-level LOG_INFO_V9 count formulas
(`N_sched*2 + N_orch*1 + 1`, "11 debug + 2 basic + ...", table count 7)
are replaced with per-thread descriptions matching the actual macro gating.

Builds clean on a2a3 and a5 across all profiling-flag combos
(pto2-off / sched / orch / orch-sched / all-on); tensormap sim tests pass
on a2a3sim and a5sim.
@gemini-code-assist

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📥 Commits

Reviewing files that changed from the base of the PR and between da79b70 and 5fe1b0c.

📒 Files selected for processing (4)
  • src/a2a3/runtime/tensormap_and_ringbuffer/docs/profiling_levels.md
  • src/a2a3/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_cold_path.cpp
  • src/a5/runtime/tensormap_and_ringbuffer/docs/profiling_levels.md
  • src/a5/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_cold_path.cpp

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@ChaoWao ChaoWao merged commit d778e0e into hw-native-sys:main Jul 1, 2026
30 of 31 checks passed
@ChaoWao ChaoWao deleted the docs/scheduler-summary-to-sched-profiling branch July 1, 2026 02:43
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