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Verilog
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clk_div8
clk_div8
clk_divider
clk_divider
compare8
compare8
counter8
counter8
fibonacci
fibonacci
fibonacci_mem_uart
fibonacci_mem_uart
fifo
fifo
fir_filter
fir_filter
fir_filter_core
fir_filter_core
fm_out
fm_out
mem_uart
mem_uart
multiply_mem_uart
multiply_mem_uart
oc8051
oc8051
oc8051_ice
oc8051_ice
parity_bit
parity_bit
phase_out
phase_out
picorv32
picorv32
pid
pid
prime
prime
prng
prng
prng_parallel
prng_parallel
pwm_in
pwm_in
pwm_out
pwm_out
shift_and_add_multiplier
shift_and_add_multiplier
spi
spi
spi_slave
spi_slave
spi_slave_regs
spi_slave_regs
switch_test
switch_test
timer
timer
uart2gpio
uart2gpio
uart2pwm
uart2pwm
uart_autobaud
uart_autobaud
uart_ice
uart_ice
uart_loopback
uart_loopback
uart_rx
uart_rx
uart_tx
uart_tx
up
up
up2
up2
up2_alu
up2_alu
up2_code
up2_code
up2_fetch
up2_fetch
up2_mem
up2_mem
up2_pc_stack
up2_pc_stack
up2_reg_stack
up2_reg_stack
vga_out
vga_out
watchdog
watchdog
.gitignore
.gitignore
README.md
README.md
install_packages.sh
install_packages.sh
list.txt
list.txt
make_list.py
make_list.py
runsim.py
runsim.py
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Verilog
Icarus
YOSYS 0.6
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