One-cycle DMC DMA aborts

[jpjonte]

AccuracyCoin tests: Explicit DMA Abort (code 2), Implicit DMA Abort (code 2).

• Disabling the DMC while its DMA is starting must leave a 1-cycle DMA (halt only). Explicit abort gives … 03 04 04 00 … per alignment, expected … 03 04 01 01 00 ….
• The second alignment needs the DMC to commit to the DMA a cycle earlier than the current APU-step-before-bus-access order allows.
• Implicit abort: a reload DMA right after a load DMA on a 1-byte, non-looping sample is also a 1-cycle DMA.

Harness: test/test_roms/accuracy_coin_test.dart (remove the tests from _failingTests when fixed).