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arm/gic: disable interrupt before modifying GICD_ICFGRn - #18

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fix/gic-disable-irq-before-config-change
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arm/gic: disable interrupt before modifying GICD_ICFGRn#18
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fix/gic-disable-irq-before-config-change

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Per the ARM GIC specification, modifying a programmable Int_config field while the corresponding interrupt is enabled results in UNPREDICTABLE behavior. setIRQTrigger currently modifies GICD_ICFGRn (GICv2) and GICD_ICFGR/GICR_ICFGR (GICv3) without first disabling the interrupt.

Fix both GICv2 and GICv3 implementations to:

  1. Check if the interrupt is currently enabled by reading the GICD_ISENABLER / GICR_ISENABLER register.
  2. Disable the interrupt if it was enabled.
  3. Modify the configuration register.
  4. Re-enable the interrupt if it was previously enabled.

While the current sole call site (Arch_invokeIRQControl) configures interrupts before they are enabled, this fix makes setIRQTrigger safe for any future callers that may reconfigure already-enabled interrupts.

Resolves seL4#290

Per the ARM GIC specification, modifying a programmable Int_config
field while the corresponding interrupt is enabled results in
UNPREDICTABLE behavior. setIRQTrigger currently modifies GICD_ICFGRn
(GICv2) and GICD_ICFGR/GICR_ICFGR (GICv3) without first disabling
the interrupt.

Fix both GICv2 and GICv3 implementations to:
1. Check if the interrupt is currently enabled by reading the
   GICD_ISENABLER / GICR_ISENABLER register.
2. Disable the interrupt if it was enabled.
3. Modify the configuration register.
4. Re-enable the interrupt if it was previously enabled.

While the current sole call site (Arch_invokeIRQControl) configures
interrupts before they are enabled, this fix makes setIRQTrigger safe
for any future callers that may reconfigure already-enabled interrupts.

Resolves seL4#290

Signed-off-by: Kent McLeod <kent.mcleod@kry10.com>
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
@kent-mcleod
kent-mcleod deleted the fix/gic-disable-irq-before-config-change branch March 26, 2026 05:55
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Changing GICD_ICFGRn without disabling the corresponding interrupt

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