GitHub - kido2k3/CA_Assignment: Verilog code to implement processor

Name		Name	Last commit message	Last commit date
Latest commit History 76 Commits
ALU.v		ALU.v
ALU_control.v		ALU_control.v
Arty-Z7-20-Master.xdc		Arty-Z7-20-Master.xdc
DMEM.v		DMEM.v
IMEM.v		IMEM.v
REG.v		REG.v
SignedExtended.v		SignedExtended.v
TESTCASE.docx		TESTCASE.docx
control.v		control.v
input_data.txt		input_data.txt
input_text.txt		input_text.txt
pipeline.v		pipeline.v
submit.rar		submit.rar
sys_tb.v		sys_tb.v