[arch][arm64] enable cycle counter#509
Conversation
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weird risc-v passes on my end Running QEMU test for riscv64...
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Excellent, I'll test tonight on the few real ARM64 machines I have here and make sure there arent any unknown gotchas, but given that the feature bit is tested I don't see there being any issues. |
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Thanks for responding so quickly! Let me know if there is any issue or gotchas |
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it does remind me of that other TODO, adding some sort of basic feature detection for the ARM stuff. |
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I think I followed a TODO in your google drive link in todo.md |
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Excellent. I rebased and pushed. Thanks a bunch! |
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Weird, it didn't detect the rebase I manually did. github used to generally do that. Anyway, closing out since it's in there. |
Enable the ARM64 PMUv3 cycle counter during per-CPU init and make arch_cycle_count() read PMCCNTR_EL0 when available.
Validation: