Annotate LA32R instructions

[FlyGoat]

Annotate LA32R instructions based on 《龙芯架构 32 位精简版参考手册 V1.03》. LA32 FPU instructions are handled as well.

For the LA32 FPU, we need some further feature set clarification.

To quote《龙芯架构参考手册 卷一：基础架构 V1.10》: "但是 FSCALEB.S/D、FLOGB.S/D、FRINT.S/D、FRECIPE.S/D 和 FRSQRTE.S/D 这 10 条指令仅需在 LA64 架构下实现。"

• There are more Instructions that cannot be implemented in 32-bit mode: movgr2fr.d, movfr2gr.d, what's the expected behaviour?

• Need confirmation on whether LA32 should include these instructions missing from LA32R: FTINT{RM/RP/RZ/RNE}.L.{S/D}.

[jiegec]

* There are more Instructions that cannot be implemented in 32-bit mode: `movgr2fr.d`, `movfr2gr.d`, what's the expected behaviour?

It also says: 实现基础浮点数指令时是否包含操作数双精度浮点数和双字整数的指令的架构是 LA32 还是 LA64 无关, I think it means that even in LA32, the instructions for double word (64-bit) move are implemented if 64-bit FPU is implemented. But the behavior is not specified for movgr2fr.d, e.g. sign extension or zero extension.

[FlyGoat]

* There are more Instructions that cannot be implemented in 32-bit mode: `movgr2fr.d`, `movfr2gr.d`, what's the expected behaviour?

It also says: 实现基础浮点数指令时是否包含操作数双精度浮点数和双字整数的指令的架构是 LA32 还是 LA64 无关, I think it means that even in LA32, the instructions for double word (64-bit) move are implemented if 64-bit FPU is implemented. But the behavior is not specified for movgr2fr.d, e.g. sign extension or zero extension.

IMO it doesn't make much sense to implement those instructions this way. Better consulting Loongson folks.