Name		Name	Last commit message	Last commit date
data		data
instr_gen		instr_gen
.gitignore		.gitignore
README.md		README.md
alu.v		alu.v
cache.v		cache.v
decoder.v		decoder.v
hazardsLogic.v		hazardsLogic.v
memory.v		memory.v
mult.v		mult.v
proc.mpf		proc.mpf
proc.v		proc.v
register.v		register.v
registerFile.v		registerFile.v
report.pdf		report.pdf
rob.v		rob.v
stb.v		stb.v
tlb.v		tlb.v

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PA-Proc

The purpose of this project is to develop a simple pipeline processor. More info in report.pdf.

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