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[MLAS] Simplify & optimize Arm64 NCHWc Convolution kernels #26691
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Rohanjames1997
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a26554a
Simplify the Fp32 Pointwise Kernel to use GEMM
Rohanjames1997 ce9b173
Simplify the Fp32 Depthwise kernel
Rohanjames1997 147ad53
Simplify the Fp32 Depthwise Conv kernel
Rohanjames1997 aae9b94
Make fp32 Depthwise Conv branchless
Rohanjames1997 5f3789a
Make fp32 Depthwise Conv branchless
Rohanjames1997 2bb2f4b
Make MlasConvFloatKernelNeonImpl branchless
Rohanjames1997 d07c57a
Remove redundant code
Rohanjames1997 314cef5
Merge two loops
Rohanjames1997 0efd348
Make ReLU branchless in Fp32 Pointwise Conv
Rohanjames1997 eac67e1
Merge branch 'microsoft:main' into simplify-fp32-conv
Rohanjames1997 a0d660c
Fix the GEMM implementation and expand the test coverage.
Rohanjames1997 7e421be
Fix segfault in ConvNoBiasAddFusion
Rohanjames1997 1d7d1de
Eliminate potential segfault
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The bounds check only verifies if the first element of the vector (ptr) is within bounds, but MlasLoadFloat32x4 loads 4 consecutive floats. This could lead to an out-of-bounds read if ptr+3 exceeds row_end. The check should be: ptr + 3 < row_end to ensure all 4 elements are within bounds.