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Add HuC6280 timing hooks - #138

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huc6280-timing-hooks
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Add HuC6280 timing hooks#138
mre wants to merge 1 commit into
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huc6280-timing-hooks

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@mre

@mre mre commented Jun 28, 2026

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So I'm not 100% certain that this is the right move, but I decided to put this PR up for discussions.

Basically, what I noticed is that my TurboGrafx emulator behaved weirdly: there were some sprite/background glitches I couldn't explain. At least in part, this is due to cycle timing issues in the 6502 emulator.

This PR is an attempt to account for those issues. Namely, extra cycles for branching and interrupts are accounted for now and I've simplified the cycle arithmetic to clean up the code a bit.

@mre
mre requested a review from omarandlorraine June 28, 2026 15:58
Comment thread src/memory.rs
/// Most memory implementations can ignore this. Systems with devices on the
/// CPU bus can override it to keep timers, video chips, or DMA engines in
/// sync with instruction execution.
fn tick(&mut self, _cycles: u64) {}

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Why do we need this? On the 6502, all cycles either read or write to memory, so by my intuition, get_byte and others will be called accordingly. (Does this assumption hold true on the HuC6280 as well?)

@omarandlorraine omarandlorraine left a comment

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Most of this makes sense to me. My only doubt is I'm not sure I understand the motive for adding the ticks method to the Memory trait.

Comment thread src/lib.rs
/// Extra cycles charged after a relative branch is taken.
#[must_use]
fn branch_taken_extra_cycles(from: u16, to: u16) -> u64 {
1 + u64::from((from ^ to) & 0xFF00 != 0)

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That's neat!

Comment thread src/instruction.rs
}

fn interrupt_dispatch_cycles() -> u64 {
8

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What does this mean? Does the 6280 really wait so long before starting an interrupt?

Comment thread src/cpu.rs
}
}

fn add_cycles(&mut self, cycles: u64) {

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I like that this has been extracted to its own method.

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2 participants