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Fix cFS/cFS#686, Merge v7.0.1 Internal Updates #158

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Merged
jphickey merged 5 commits into from
Apr 30, 2026
Merged

Fix cFS/cFS#686, Merge v7.0.1 Internal Updates #158

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bb88193
Fix #28, change bitmask to uint8 and simplify macro
jphickey Mar 31, 2026
0eb48de
Fix #31, Make implicit padding explicit
Cameron-Sykes Apr 16, 2026
234b715
Fix #33, update bitmask definition in unit test
jphickey Apr 20, 2026
afbba68
Fix cFS/cFS#677, correct ATS table name
jphickey Apr 22, 2026
e69162f
Fix cFS/cFE#219, correct alignment of SC ATS table
jphickey Apr 28, 2026
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8 changes: 5 additions & 3 deletions config/default_sc_msgdefs.h
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Original file line number Diff line number Diff line change
Expand Up @@ -150,7 +150,7 @@ typedef struct

uint8 CmdErrCtr; /**< \brief Counts Request Errors */
uint8 CmdCtr; /**< \brief Counts Ground Requests */
uint8 Padding8; /**< \brief Structure padding */
uint8 Padding1; /**< \brief Structure padding */

uint16 SwitchPendFlag; /**< \brief Switch pending flag: 0 = NO, 1 = YES */
uint16 NumRtsActive; /**< \brief Number of RTSs currently active */
Expand All @@ -175,19 +175,21 @@ typedef struct
uint32 NextRtsWakeupCnt; /**< \brief Next RTS Command Absolute Wakeup Count */
uint32 NextAtsTime; /**< \brief Next ATS Command Time (seconds) */

uint16 RtsExecutingStatus[(SC_NUMBER_OF_RTS + 15) / 16];
uint8 RtsExecutingStatusBits[(SC_NUMBER_OF_RTS + 7) / 8];
/**< \brief RTS executing status bit map where each uint16 represents 16 RTS numbers. Note: array
index numbers and bit numbers use base zero indexing, but RTS numbers use base one indexing. Thus,
the LSB (bit zero) of uint16 array index zero represents RTS number 1, and bit one of uint16 array
index zero represents RTS number 2, etc. If an RTS is IDLE, then the corresponding bit is zero.
If an RTS is EXECUTING, then the corresponding bit is one. */

uint16 RtsDisabledStatus[(SC_NUMBER_OF_RTS + 15) / 16];
uint8 RtsDisabledStatusBits[(SC_NUMBER_OF_RTS + 7) / 8];
/**< \brief RTS disabled status bit map where each uint16 represents 16 RTS numbers. Note: array
index numbers and bit numbers use base zero indexing, but RTS numbers use base one indexing. Thus,
the LSB (bit zero) of uint16 array index zero represents RTS number 1, and bit one of uint16 array
index zero represents RTS number 2, etc. If an RTS is ENABLED, then the corresponding bit is zero.
If an RTS is DISABLED, then the corresponding bit is one. */

uint8 Padding2[2];
} SC_HkTlm_Payload_t;

/**\}*/
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12 changes: 6 additions & 6 deletions eds/sc.xml
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Expand Up @@ -146,20 +146,20 @@
<Entry name="AtpFreeBytes" type="AtpFreeBytes" shortDescription="Free Bytes in each ATS" />
<Entry type="BASE_TYPES/uint32" name="NextRtsWakeupCnt" shortDescription="Next RTS Command Absolute Wakeup Count" />
<Entry type="BASE_TYPES/uint32" name="NextAtsTime" shortDescription="Next ATS Command Time (seconds)" />
<Entry name="RtsExecutingStatus" type="RtsStatusBits" shortDescription="RTS disabled status bit map">
<Entry name="RtsExecutingStatusBits" type="RtsStatusBits" shortDescription="RTS disabled status bit map">
<LongDescription>
Each BASE_TYPES/uint16 represents 16 RTS numbers.
Each entry represents 8 RTS numbers. Note: array
Note: array index numbers and bit numbers use base zero indexing, but RTS numbers use base one indexing.
Thus, the LSB (bit zero) of BASE_TYPES/uint16 array index zero represents RTS number 1, and bit one of BASE_TYPES/uint16
Thus, the LSB (bit zero) of uint8 array index zero represents RTS number 1, and bit one of uint8
array index zero represents RTS number 2, etc. If an RTS is ENABLED, then the corresponding bit is zero.
If an RTS is DISABLED, then the corresponding bit is one.
</LongDescription>
</Entry>
<Entry name="RtsDisabledStatus" type="RtsStatusBits" shortDescription="RTS executing status bit map">
<Entry name="RtsDisabledStatusBits" type="RtsStatusBits" shortDescription="RTS executing status bit map">
<LongDescription>
Each BASE_TYPES/uint16 represents 16 RTS numbers. Note: array
Each entry represents 8 RTS numbers. Note: array
index numbers and bit numbers use base zero indexing, but RTS numbers use base one indexing. Thus,
the LSB (bit zero) of BASE_TYPES/uint16 array index zero represents RTS number 1, and bit one of BASE_TYPES/uint16 array
the LSB (bit zero) of uint8 array index zero represents RTS number 1, and bit one of uint8 array
index zero represents RTS number 2, etc. If an RTS is IDLE, then the corresponding bit is zero.
If an RTS is EXECUTING, then the corresponding bit is one.
</LongDescription>
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12 changes: 8 additions & 4 deletions fsw/src/sc_cmds.c
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Expand Up @@ -457,15 +457,19 @@ void SC_SendHkPacket(void)
** Fill out the RTS status bit mask
** First clear out the status mask
*/
memset(SC_OperData.HkPacket.Payload.RtsExecutingStatus, 0, sizeof(SC_OperData.HkPacket.Payload.RtsExecutingStatus));
memset(SC_OperData.HkPacket.Payload.RtsDisabledStatus, 0, sizeof(SC_OperData.HkPacket.Payload.RtsDisabledStatus));
memset(SC_OperData.HkPacket.Payload.RtsExecutingStatusBits,
0,
sizeof(SC_OperData.HkPacket.Payload.RtsExecutingStatusBits));
memset(SC_OperData.HkPacket.Payload.RtsDisabledStatusBits,
0,
sizeof(SC_OperData.HkPacket.Payload.RtsDisabledStatusBits));

for (i = 0; i < SC_NUMBER_OF_RTS; i++)
{
RtsInfoPtr = SC_GetRtsInfoObject(SC_RTS_IDX_C(i));

SC_SET_HKTLM_RTS_MASK(SC_OperData.HkPacket.Payload.RtsDisabledStatus, i, RtsInfoPtr->DisabledFlag);
SC_SET_HKTLM_RTS_MASK(SC_OperData.HkPacket.Payload.RtsExecutingStatus,
SC_SET_HKTLM_RTS_MASK(SC_OperData.HkPacket.Payload.RtsDisabledStatusBits, i, RtsInfoPtr->DisabledFlag);
SC_SET_HKTLM_RTS_MASK(SC_OperData.HkPacket.Payload.RtsExecutingStatusBits,
i,
(RtsInfoPtr->RtsStatus == SC_Status_EXECUTING));
} /* end for */
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19 changes: 8 additions & 11 deletions fsw/src/sc_cmds.h
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Original file line number Diff line number Diff line change
Expand Up @@ -35,22 +35,19 @@ typedef enum
APPEND
} SC_TableType;

#define SC_HKTLM_MEMBER_SIZE(x) sizeof(((SC_HkTlm_Payload_t *)0)->x)

/* Macro to set/clear bits in the HK TLM bitmask for RTS status */
enum
{
SC_BITS_PER_HKTLM_OCTET = SC_NUMBER_OF_RTS / SC_HKTLM_MEMBER_SIZE(RtsDisabledStatus),
SC_BITS_PER_HKTLM_WORD = SC_HKTLM_MEMBER_SIZE(RtsDisabledStatus[0]) * SC_BITS_PER_HKTLM_OCTET,
SC_BITS_PER_HKTLM_ENTRY = 8 /* by definition, as this now uses uint8 only */
};

#define SC_SET_HKTLM_RTS_MASK(f, s, v) \
do \
{ \
if (v) \
f[s / SC_BITS_PER_HKTLM_WORD] |= (1 << (s % SC_BITS_PER_HKTLM_WORD)); \
else \
f[s / SC_BITS_PER_HKTLM_WORD] &= ~(1 << (s % SC_BITS_PER_HKTLM_WORD)); \
#define SC_SET_HKTLM_RTS_MASK(f, s, v) \
do \
{ \
if (v) \
f[s / SC_BITS_PER_HKTLM_ENTRY] |= (1 << (s % SC_BITS_PER_HKTLM_ENTRY)); \
else \
f[s / SC_BITS_PER_HKTLM_ENTRY] &= ~(1 << (s % SC_BITS_PER_HKTLM_ENTRY)); \
} while (0)

/**
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33 changes: 19 additions & 14 deletions fsw/tables/sc_ats1.c
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Expand Up @@ -68,17 +68,22 @@
#define SC_RESET_COUNTERS_CKSUM (0x8E)
#endif

typedef union
{
uint32 Align32;
SC_AtsEntryHeader_t Hdr;
} SC_AlignedAtsEntryHeader_t;
/* Custom table structure, modify as needed to add desired commands */
typedef struct
{
SC_AtsEntryHeader_t hdr1;
SC_NoopCmd_t cmd1;
SC_AtsEntryHeader_t hdr2;
SC_EnableRtsCmd_t cmd2;
SC_AtsEntryHeader_t hdr3;
SC_StartRtsCmd_t cmd3;
SC_AtsEntryHeader_t hdr4;
SC_ResetCountersCmd_t cmd4;
SC_AlignedAtsEntryHeader_t hdr1;
SC_NoopCmd_t cmd1;
SC_AlignedAtsEntryHeader_t hdr2;
SC_EnableRtsCmd_t cmd2;
SC_AlignedAtsEntryHeader_t hdr3;
SC_StartRtsCmd_t cmd3;
SC_AlignedAtsEntryHeader_t hdr4;
SC_ResetCountersCmd_t cmd4;
} SC_AtsStruct1_t;

/* Define the union to size the table correctly */
Expand All @@ -94,31 +99,31 @@ typedef union
/* Used designated intializers to be verbose, modify as needed/desired */
SC_AtsTable1_t SC_Ats1 = {
.ats = {/* 1 */
.hdr1 = {.CmdNumber = SC_COMMAND_NUM_INITIALIZER(1),
.hdr1.Hdr = {.CmdNumber = SC_COMMAND_NUM_INITIALIZER(1),
.TimeTag_MS = SC_CMD1_TIME >> 16,
.TimeTag_LS = SC_CMD1_TIME & 0xFFFF},
.cmd1 = {CFE_MSG_CMD_HDR_INIT(SC_CMD_MID, 0, SC_NOOP_CC, SC_NOOP_CKSUM)},
.cmd1 = {CFE_MSG_CMD_HDR_INIT(SC_CMD_MID, SC_MEMBER_SIZE(cmd1), SC_NOOP_CC, SC_NOOP_CKSUM)},

/* 2 */
.hdr2 = {.CmdNumber = SC_COMMAND_NUM_INITIALIZER(2),
.hdr2.Hdr = {.CmdNumber = SC_COMMAND_NUM_INITIALIZER(2),
.TimeTag_MS = SC_CMD2_TIME >> 16,
.TimeTag_LS = SC_CMD2_TIME & 0xFFFF},
.cmd2 = {CFE_MSG_CMD_HDR_INIT(SC_CMD_MID, SC_MEMBER_SIZE(cmd2), SC_ENABLE_RTS_CC, SC_ENABLE_RTS1_CKSUM)},

.cmd2.Payload = {.RtsNum = SC_RTS_NUM_INITIALIZER(1)},

/* 3 */
.hdr3 = {.CmdNumber = SC_COMMAND_NUM_INITIALIZER(3),
.hdr3.Hdr = {.CmdNumber = SC_COMMAND_NUM_INITIALIZER(3),
.TimeTag_MS = SC_CMD3_TIME >> 16,
.TimeTag_LS = SC_CMD3_TIME & 0xFFFF},
.cmd3 = {CFE_MSG_CMD_HDR_INIT(SC_CMD_MID, SC_MEMBER_SIZE(cmd3), SC_START_RTS_CC, SC_START_RTS1_CKSUM)},

/* 4 */
.hdr4 = {.CmdNumber = SC_COMMAND_NUM_INITIALIZER(4),
.hdr4.Hdr = {.CmdNumber = SC_COMMAND_NUM_INITIALIZER(4),
.TimeTag_MS = SC_CMD4_TIME >> 16,
.TimeTag_LS = SC_CMD4_TIME & 0xFFFF},
.cmd4 = {CFE_MSG_CMD_HDR_INIT(SC_CMD_MID, SC_MEMBER_SIZE(cmd4), SC_RESET_COUNTERS_CC,
SC_RESET_COUNTERS_CKSUM)}}};

/* Macro for table structure */
CFE_TBL_FILEDEF(SC_Ats1, SC.AtsTable1, SC Example ATS_TBL1, sc_ats1.tbl)
CFE_TBL_FILEDEF(SC_Ats1, SC.ATS_TBL1, SC Example ATS_TBL1, sc_ats1.tbl)
4 changes: 2 additions & 2 deletions unit-test/sc_cmds_tests.c
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Expand Up @@ -837,8 +837,8 @@ void SC_SendHkPacket_Test(void)
SC_RtsIndex_t RtsIndex = SC_RTS_IDX_C(SC_NUMBER_OF_RTS - 1);
SC_RtsInfoEntry_t *RtsInfoPtr;
SC_AtsInfoTable_t *AtsInfoPtr;
uint16 ExpectedRtsExecStatus[(SC_NUMBER_OF_RTS + 15) / 16];
uint16 ExpectedRtsDisabledStatus[(SC_NUMBER_OF_RTS + 15) / 16];
uint8 ExpectedRtsExecStatus[(SC_NUMBER_OF_RTS + 7) / 8];
uint8 ExpectedRtsDisabledStatus[(SC_NUMBER_OF_RTS + 7) / 8];

memset(&ExpectedRtsExecStatus[0], 0u, sizeof(ExpectedRtsExecStatus));
memset(&ExpectedRtsDisabledStatus[0], 0u, sizeof(ExpectedRtsDisabledStatus));
Expand Down
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