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Correct input.txn of tests #260

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Correct input.txn of tests #260

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2 changes: 1 addition & 1 deletion verif/traces/traceplayer/cc_alexnet_conv5_relu5_int16_dtest_cvsram/input.txn
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Original file line number Diff line number Diff line change
Expand Up @@ -183,7 +183,7 @@ read_reg 0xffff1400 0x00030003 0x00000000 #NVDLA_CDMA.S_STATUS_0
write_reg 0xffff1416 0x0 #NVDLA_CDMA.D_BATCH_NUMBER_0
read_reg 0xffff1416 0x0000001f 0x00000000 #NVDLA_CDMA.D_BATCH_NUMBER_0
write_reg 0xffff1403 0x0 #NVDLA_CDMA.S_CBUF_FLUSH_STATUS_0
read_reg 0xffff1403 0x00000001 0x00000000 #NVDLA_CDMA.S_CBUF_FLUSH_STATUS_0
read_reg 0xffff1403 0x00000001 0x00000001 #NVDLA_CDMA.S_CBUF_FLUSH_STATUS_0
write_reg 0xffff141a 0x0 #NVDLA_CDMA.D_WEIGHT_FORMAT_0
read_reg 0xffff141a 0x00000001 0x00000000 #NVDLA_CDMA.D_WEIGHT_FORMAT_0
write_reg 0xffff143a 0x7841af46 #NVDLA_CDMA.D_CYA_0
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2 changes: 1 addition & 1 deletion verif/traces/traceplayer/googlenet_conv2_3x3_int16/input.txn
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Expand Up @@ -132,7 +132,7 @@ read_reg 0xffff141d 0x00000001 0x00000000 #NVDLA_CDMA.D_WEIGHT_RAM_TYPE_0
write_reg 0xffff1439 0x0 #NVDLA_CDMA.D_PERF_WT_READ_LATENCY_0
read_reg 0xffff1439 0xffffffff 0x00000000 #NVDLA_CDMA.D_PERF_WT_READ_LATENCY_0
write_reg 0xffff1403 0x0 #NVDLA_CDMA.S_CBUF_FLUSH_STATUS_0
read_reg 0xffff1403 0x00000001 0x00000000 #NVDLA_CDMA.S_CBUF_FLUSH_STATUS_0
read_reg 0xffff1403 0x00000001 0x00000001 #NVDLA_CDMA.S_CBUF_FLUSH_STATUS_0
write_reg 0xffff1437 0x0 #NVDLA_CDMA.D_PERF_WT_READ_STALL_0
read_reg 0xffff1437 0xffffffff 0x00000000 #NVDLA_CDMA.D_PERF_WT_READ_STALL_0
write_reg 0xffff1422 0x92eabbc0 #NVDLA_CDMA.D_WGS_ADDR_LOW_0
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