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commit 5ee8009 upstream. New CPU #defines encode vendor and family as well as model. Intel-SIG: commit 5ee8009 perf/x86/intel/cstate: Switch to new Intel CPU model defines Backport cstate PMU for DMR Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Link: https://lore.kernel.org/all/20240424181459.41500-1-tony.luck%40intel.com [ Zhang Rui: amend commit log ] Signed-off-by: Zhang Rui <rui.zhang@intel.com>
commit 7ac422cf7b16ec524bcd8e017459e328a4103f63 upstream. From a C-state residency profiling perspective, Diamond Rapids is similar to SRF and GNR, supporting core C1/C6, module C6, and package C2/C6 residency counters. Similar to CWF, the C1E residency can be accessed via PMT only. Intel-SIG: commit 7ac422cf7b16 perf/x86/intel/cstate: Add Diamond Rapids support Backport cstate PMU for DMR Signed-off-by: Zide Chen <zide.chen@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Link: https://patch.msgid.link/20251215182520.115822-3-zide.chen@intel.com [ Zhang Rui: amend commit log ] Signed-off-by: Zhang Rui <rui.zhang@intel.com>
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Backport cstate PMU for DMR.
Tests:
Tested on DMR/CWF/SRF,
On CWF/SRF, no change observed.
On DMR, the cstate perf events starts to work. This successfully enables lkvs:bm:cstate testcases.
1: perf/x86/intel/cstate: Switch to new Intel CPU model defines
2: perf/x86/intel/cstate: Add Diamond Rapids support