cherry-pick oneDNN master binary post-Ops optimization

[usstq]

Details:

• cherry-pick oneDNN master binary post-Ops optimizations

Tickets:

• MFDNN-8569

[usstq]

@dmitry-gorokhov About your concern on newly added register, I double checked all changes, most of them have set preserve_gpr = true for binary injector to add push & pop instructions to preserve & restore/isolate the register access within the injected code, so there are no risk of overwriting.

the only two kernels setting preserve_gpr = false are jit_avx512_core_amx_1x1_conv_kernel.cpp and jit_avx512_core_amx_conv_kernel.cpp:

for jit_avx512_core_amx_1x1_conv_kernel.cpp, the new register bin_injector_helper_reg_3(r11) was shared by reg_bias and reg_scratch, from the source code I can see these two registers are actually used as a scratch register, there is a mov instruction for initializing them right before using them, and the author also added an additional conditional_register_preserve_guard_t to preserve bin_injector_helper_reg_3 in interleave_store.

for jit_avx512_core_amx_conv_kernel.cpp, the new register bin_injector_helper_reg_3 was shared with few other registers also, but again the author added an additional conditional_register_preserve_guard_t to preserve bin_injector_helper_reg_3 in store_output() which is the common function for all call path leading to post ops injector.

I also have done local test on 70+ INT8 models on SPR over 10-samples dataset and saw no accuracy issues.

Thus I believe the author was aware of this risk and handled it intentionally and successfully.

[usstq]

closed since it has been included in #13775