[CPU] GDN uses native bf16/f16 instruction.

[zhangYiIntel]

Details:

• Enable jit kernel with native f16/bf16 instruction only support head_size which is multiple of 32
• Fuse reorder within intrinsic kernel for others

Tickets:

• CVS-182464

AI Assistance:

• AI assistance used: yes
• Use AI to simplify code

[maxnick]

@xuchen-intel , could you please review?

[Copilot]

Pull request overview

This PR extends the CPU plugin’s GatedDeltaNet (GDN) execution to better support f16/bf16 by introducing an AVX-512 JIT kernel leveraging native bf16/fp16 instructions (for head sizes divisible by 32) and by generalizing the reference recurrent linear attention path to handle xf16 precisions. It also adds functional test coverage for f16/bf16 GDN configurations.

Changes:

• Add an x64 AVX-512 JIT kernel for GDN using native bf16/fp16 instructions with a head-size % 32 constraint.
• Templatize the recurrent linear attention kernel to support f16/bf16 in addition to f32.
• Add functional test instances for GDN f16/bf16 cases.

Reviewed changes

Copilot reviewed 6 out of 6 changed files in this pull request and generated 3 comments.

Show a summary per file

File	Description
src/plugins/intel_cpu/tests/functional/shared_tests_instances/subgraph_tests/gated_delta_net.cpp	Adds f16/bf16 parameterized test cases for GDN.
src/plugins/intel_cpu/src/nodes/kernels/x64/gdn_jit_kernel.hpp	Introduces the JIT kernel interface, call args, and compile params for xf16 GDN.
src/plugins/intel_cpu/src/nodes/kernels/x64/gdn_jit_kernel.cpp	Implements the AVX-512 bf16/fp16 JIT codegen and factory creation logic.
src/plugins/intel_cpu/src/nodes/kernels/linear_attn/recurrent_linear_attn.cpp	Generalizes the reference kernel to xf16 and optimizes some loads/stores.
src/plugins/intel_cpu/src/nodes/gated_delta_net.h	Adds x64-only members for caching/using the GDN JIT kernel.
src/plugins/intel_cpu/src/nodes/gated_delta_net.cpp	Enables f16/bf16 execution, adds JIT dispatch, and adjusts scratchpad sizing/typing.