Skip to content

perf(qwen35): carry the GDN decode state slice in registers across the kv_mem reduction - #1054

Merged
FeathBow merged 1 commit into
pegainfer-project:mainfrom
CAICAIIs:perf/qwen35-gdn-decode-kernel
Sep 18, 2026
Merged

FeathBow merged 1 commit into
pegainfer-project:mainfrom
CAICAIIs:perf/qwen35-gdn-decode-kernel

Conversation

@CAICAIIs

Copy link
Copy Markdown
Collaborator

Summary

The gated delta rule decode kernel did its two passes (decay, then rank-1 update) with a global round-trip between them: pass 1 stored the decayed state slice back to global memory, the kv_mem reduction consumed it, and pass 2 reloaded it to apply delta·k and store again. The key slice is only 32 floats per thread — it lives in registers across the reduction instead, so global memory sees one read and one write per state element.

Measured (1x A100-40GB, vLLM 0.27.0 baseline)

1024-token prompts, greedy, vllm bench serve, zero failed requests; single run per cell:

cell before TPOT ms after TPOT ms delta vLLM 0.27 TPOT ms
1024/256 c16 13.51 12.98 −3.9% 11.00
bs1 1024/256 9.77 9.36 −4.2%* 8.32

The kernel's per-layer-step time was 97.0 µs vs vLLM's FLA fused_recurrent_gated_delta_rule_packed 43.6 µs; the register-carried state removes the extra global round-trip that was the difference from FLA's bandwidth-floor implementation. Found via nsys kernel attribution (a fuller doc covering the decode kernel gaps is being prepared separately).

Testing

  • The rewrite is arithmetically identical — same f32 ops in the same order, state values carried in registers instead of a global round-trip.
  • hf_golden_gate TP1 2/2; lib tests 102 passed.

Claim boundary

Single-run cells on one GPU; draft pending review. The kernel still has no sm_80 tuning pass; the remaining GDN gap to FLA and the c16 GEMM family deficit (+2.8 ms/step) stay open in the attribution doc's queue.

…e kv_mem reduction

The gated delta rule decode kernel did its two passes (decay, then rank-1
update) with a global round-trip between them: pass 1 stored the decayed
state slice back to global memory, the kv_mem reduction consumed it, and
pass 2 reloaded it to apply delta·k and store again. The key slice is only
32 floats per thread and lives in registers across the reduction instead —
global memory now sees one read and one write per state element.

Measured on 1x A100-40GB vs the pre-change tree (vLLM 0.27.0 baseline,
1024-token prompts, zero failed requests): c16 TPOT 13.51 -> 12.98 ms
(-3.9%, output throughput 936 -> 1000 tok/s), bs1 TPOT 9.77 -> 9.36 ms
(-4.2%). The kernel's per-layer-step time was 97.0 us vs vLLM's FLA
fused_recurrent 43.6 us; the register-carried state removes the extra
global round-trip that was the difference from FLA's bandwidth-floor
implementation. hf_golden_gate TP1 2/2 (the rewrite is arithmetically
identical — same f32 ops in the same order).

Signed-off-by: CAICAIIs <3360776475@qq.com>
@CAICAIIs
CAICAIIs marked this pull request as ready for review September 17, 2026 11:42
@FeathBow

Copy link
Copy Markdown
Collaborator

@codex review

@FeathBow
FeathBow merged commit 0db9938 into pegainfer-project:main Sep 18, 2026
27 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants