I find the gap between what an institution's contract claims and what its implementation actually does, and write the patch.

Current arc — large Mixture-of-Experts LLMs on GPUs people actually own: make the weights fit, make the 4-bit compute path fast, and adjudicate every performance claim under preregistered, OpenTimestamps-stamped protocols — failures published at the same volume as wins.

Fine-tune a 120B MoE at 9.82 GB, and prove with hashes that the expert weights are still byte-identical to the vendor's release.

• grouped-nf4-gemm — a Triton kernel that runs the grouped expert GEMM directly on the 4-bit-packed weights — one launch for all active experts, codebook decoded in registers, no dequantize-to-bf16 round trip.
  • Flagship: Qwen3-235B-A22B decoding coherent text at 4.3–4.4 tok/s on 15.2 GB of VRAM, experts streamed from pinned host RAM at 93–94 % of the measured bus ceiling.
  • The strongest objection — that bitsandbytes' own CUDA dequant kernel would also hide under the copy shadow — was registered as a prediction and refuted: 2.33× throughput, 2.21× energy on the identical pipeline.
  • NF4 on the bitsandbytes layout unchanged, and MXFP4 on a checkpoint's exact released bytes: gpt-oss-120b serves at shipped-precision perplexity (the +9.4 % requant tax deleted) and QLoRA-trains at 9.82 GB peak VRAM with 144/144 expert hashes byte-identical after training.
  • Census decode runs 1.16–2.73× the dequant path; six blind confirmatories have run — the first five failed as registered and are published in full, the sixth passed clean.
  • First silicon beyond NVIDIA landed 2026-07-22 — MI300X correctness confirmed, 44/44 at the same fidelity tier (streaming numbers stay projections until measured; the protocol is public and refuting runs are welcome).
• The NVMe tier — the storage pyramid extended to VRAM / host RAM / disk, so models whose packed experts outgrow host RAM stay reachable: a seconds-per-token batch tier by construction, and every number says so.
  • The arena format is expert-major and O_DIRECT-aligned with the provenance chain intact: a relocation bake carries the checkpoint's own per-segment sha256s, and verify --against-source closes shipped bytes → manifest → arena.
  • The bake is deterministic across GPU architectures — sm_89 vs sm_86, different hosts, independent checkpoint downloads: 20,480/20,480 segment hashes identical (scored 1.000000 against a registered 0.999 bar) — so a 100-GB-class arena never ships: publish the manifest, users bake and verify locally.
  • Device ceilings are measured, not assumed, including that full-rate O_DIRECT reads under a saturating PCIe H2D stream cost neither side anything on the first owned box — the disk→RAM→GPU overlap the tier leans on, held on real hardware rather than by assertion.
• experts4bit-qlora — the training and serving stack: 4-bit quantization of the fused expert stacks bitsandbytes' walker silently skips (bitsandbytes#1849), a streaming loader, per-expert LoRA, and layer-granular expert offload.
  • Qwen3-30B-A3B QLoRA peaks at 7.16 GB, Gemma-4-26B-A4B at 8.47 GB — both OOM without it.
  • The seed-matched A/B (ab-telemetry/) shows −57 % peak VRAM with convergence preserved, at ~+11 % s/step.
  • enable_fast(model) routes frozen-expert inference through the fused kernel (3.65× at bs=1); pipelined residency converts spare VRAM into decode speed, with hot sets picked from a routing histogram rather than by index (+19–120 % over the all-cold floor — measured on thin-link hosts, ≈0 on fat-PCIe boxes; the scoping is in the receipts).
• Upstream (MoE stack):
  • bitsandbytes#1965 — open — Experts4bit as a deliberately clean 4-bit diff, the N-bit generalization staged behind it, all CI legs green
  • axolotl#3797 — open — expert_offload as a self-contained plugin, seed-matched A/B including DDP arms
  • unsloth-zoo#915 — open — OLMoE load_in_4bit crash: route the fused experts through the MoE backend
  • unsloth-zoo#849 — silent expert-weight transposition, filed with a repro harness; maintainer-verified at 358×/387× the bf16 noise floor on a B200 and fixed upstream — merged

Intel GPU (OpenVINO) — __local-pointer kernel-compile fixes across the LoRA / MoE / fully-connected kernels, plus a regression test so the bug class can't silently return (#35661, #35712, #36017 — all merged), with a core input-validation sweep (#36543 — in review). ov-impact-bench measures what the fixes unlock on real Intel silicon.

Security research on the side — good-faith hunting and coordinated disclosure (policy).

The method is the part that transfers — six confirmatories, five published failures, one kernel: Receipts-driven engineering. Research practice: cerinamroth.com · consulting: jordananderson.work.