chore(release): v0.44.0 — five-lane hub (live trap classes, verified-selector 40→41, multi-mem coverage, size win, DWARF gate)

[avrabe]

Five oracle-gated lanes, each coordinator-re-verified before merge. Builds on the v0.43.1 clean base.

Lane	PR	What
A #756	#766	i64 div/rem + i32.trunc_f64 into the LIVE trap validator (5→7 classes); red-first non-vacuity proven
G VCR-ISA-001	#767	generate-not-mirror model 40→41 ops (i32.eqz), 473→474 Qed, byte-invisible, drift-guard holds
B #406	#764	multi-segment static-data coverage (26/26, anti-vacuous) + honest per-mem MPU loud-decline
D #390	#765	redundant-store elim in forward_stack_reloads, gust_poll 724→716 B
C #394	#763	independent llvm-dwarfdump gate de-circularizes DWARF verification

Documented residuals (honest)

• 0.43.0: #746 fix relocates but MISCOMPILES the wide-static copy path — silent wrong bytes (was: skip) #757 — accepted residual: confirmed on silicon, unreproducible from the issue text, blocked on the reporter's module. Multi-memory structural isolation: lower N wasm memories to N distinct native bases (memidx-through-IR, cross-memory ops, expose base/size for MPU/PMP) #406 widened coverage (found nothing); NOT fixed, stays open.
• i64.trunc_f64 — not wired live (selector loud-declines it; no shipped lowering to validate); classifier unit-gated.
• Self-contained --cortex-m: full-page linmem view can overlap R9 globals table at top of SRAM (latent, impact unverified) #761 — latent linmem/globals overlap, filed.

Pin sweep: workspace + path-deps + MODULE.bazel + npm → 0.44.0. Claim gate 18/18 (474 Qed). fmt clean.

🤖 Generated with Claude Code

[codecov]

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