Add NVIC support to Cortex-M7 for PDP bringup - #113
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Wire the NVIC interrupt and register interfaces, translate NVIC addresses, and pass the MPU region count to QEMU. Signed-off-by: Nikhita Nadgauda <nnadgaud@qti.qualcomm.com>
nnadgaud
requested review from
Brian Cain (androm3da),
Mark Burton (markfoodyburton) and
Pierrick Bouvier (p-b-o)
August 26, 2026 07:26
Philippe Mathieu-Daudé (philmd)
self-requested a review
August 26, 2026 13:27
Philippe Mathieu-Daudé (philmd)
approved these changes
Aug 26, 2026
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LGTM also. Seems like it needs additional polishing from CI build failures. |
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Wire the NVIC interrupt and register interfaces, translate NVIC addresses, and pass the MPU region count to QEMU.