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🔭 I’m currently working on Implementation of AHB Master - Slave and verification using system Verilog and UVM
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🌱 I’m currently learning DSA, UVM
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👨💻 All of my projects are available at https://www.linkedin.com/in/raviranjan-kumar-ece/
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💬 Ask me about Verilog , System Verilog , CDC , FIFO, AMBA
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📫 How to reach me raviranjan.kumar.ece@gmail.com
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⚡ Fun fact I Think I am Very Blessed
- india
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08:28
(UTC +05:30) - in/raviranjan-kumar-ece
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