RISC-V-CPU-

Simulated the core functions of a RISC-V RV32I processor using Verilog and Xilinx software (EC413 Computer Architecture BU)

Name		Name	Last commit message	Last commit date
Latest commit History 2 Commits
ALU.v		ALU.v
ALU_tb.v		ALU_tb.v
README.md		README.md
decode.v		decode.v
decode_tb.v		decode_tb.v
fetch.v		fetch.v
fetch_tb.v		fetch_tb.v
fibonacci.vmh		fibonacci.vmh
gcd.vmh		gcd.vmh
ram.v		ram.v
ram_tb.v		ram_tb.v
regFile.v		regFile.v
regFile_tb.v		regFile_tb.v
top.v		top.v
top_tb.v		top_tb.v

Provide feedback