Improve RzIL floating-point support#6626
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Co-authored-by agent: Codex/GPT-5
Co-authored-by agent: Codex/GPT-5
Co-authored-by agent: Codex/GPT-5
Co-authored-by agent: Codex/GPT-5
Co-authored-by agent: Codex/GPT-5
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Detailed description
This PR improves IEEE-754 edge-case handling in RzFloat and adds reusable floating-point facilities to RzIL.
The RzFloat changes fix:
The RzIL changes add scoped binary80 precision support through RzFloatRPrecision and the FWITH_RPREC opcode. Precision scopes restore the previous SoftFloat state after
successful evaluation and after evaluation failures. The new opcode is supported by validation, duplication, destruction, string and JSON exporters, graph output, and VM
evaluation.
This PR also adds runtime rounding-mode constructors for conversion, rounding, square root, addition, subtraction, multiplication, division, and remainder operations. The
rounding mode is represented by a 32-bit IL bitvector whose values correspond to RzFloatRMode. RNE, RNA, RTP, RTN, and RTZ are supported; unknown values fall back to RNE. These
helpers expand to ordinary LET/ITE expressions and do not introduce a dynamic rounding-mode opcode.
Finally, FEXCEPT now emits a VM event only when the queried exception is actually present, while preserving exceptions raised by nested conversions.
No Rizin book update is needed because this PR does not change user-facing commands or workflows.
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