The aim is to create a one stop environment for parallella development
https://github.com/peteasa/parallella-yoctobuild - A Simple build environment for Parallella using Yocto
https://github.com/parallella/oh.git - PARALLELLA: Supercomputing for Everyone - open hardware FPGA design associated with the Parallella project.
https://github.com/analogdevicesinc/hdl - Analog Devices HDL libraries and projects
https://github.com/Xilinx/device-tree-xlnx.git - Xilinx device-tree tcl generation scripts used with the Xilinx SDK to generate a template device tree.
A working environment for a developer to take an idea from concept to working release on the Parallella platform. The Xilinx tools are required to build the parallella fpga and a few build essentials are required for the Yocto Linux build, but after that the job of ensuring that the matching Linux, Analog Devices hdl, Open Hardware is provided by choosing the appropriate branch in this repository and checking out the matching submodules.
I realise there is a lot to take in with this project so I have create a Getting Started Guide and Quick Start list of instructions. Feedback is always welcome
To use yocto you first need to install some packages. See latest Yocto Project Quick Start. This assumes you are working on a Ubuntu machine:
$ sudo apt-get install gawk wget git-core diffstat unzip texinfo gcc-multilib build-essential chrpath socat libsdl1.2-dev xtermTo use the parallella template project ./parallella-fpga/7020_hdmi you need to install Vivado 2015.2 see http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/2015-2.html, download 2015.2. I am also using the 2015.2.1 update.
Clone this repository onto your Linux build machine:
$ git clone git@github.com:peteasa/parallella
$ cd parallellaCheckout the branch that provides the versions that you want to use then to prepare the environment and download the necessary git submodules, you need to run the initgitsubmodules.sh script. This only needs to be done once:
$ source initgitsubmodules.shThe result will be new folders examples, parallella-fpga/oh, parallella-fpga/7020_hdmi, parallella-fpga/AdiHDLLib, parallella-yoctobuild, parallella-yoctobuild/poky, parallella-yoctobuild/meta-xilinx, parallella-yoctobuild/meta-parallella and parallella-yoctobuild/meta-epiphany created from specific commits on github.
For full instructions to setup the parallella-yoctobuild environment see https://github.com/peteasa/parallella-yoctobuild
For partial instructions to setup and use xilinx tools to build an fpga visit https://www.parallella.org/2015/03/23/new-parallella-elink-fpga-design-project-now-available-in-vivado/. I provide a top level makefile to build the parallella fpga.
$ source xilinx/Vivado/2015.2/settings64.sh
$ cd ./parallella-fpga
$ make allIf all goes well after the make process is done the ./parallella-fpga/7020_hdmi and ./parallella-fpga/7010_hdmi folders will contain a bitstream.
For instructions that need to be adapted to add more to the fpga be inspired by http://parallellagram.org/
There are four folders in .gitignore that are ignored by this repository. You can use these folder to store code for your own projects:
$ mkdir mywork
$ mkdir project
$ mkdir projects
$ mkdir testThere is a corresponding folder in the parallella-yoctobuild directory for the yocto changes that you might need to make for your project. And a corresponding folder in the parallella-fpga directory for your fpga project. If you use these folders for your work then you dont need to modify any of the files I provide, making git updating easier (no conflicts or local checked out files).
DANGER You may need to clean the parallella-fpga project before you attempt to update. As this will remove a lot of generated files and may also remove some files that you want to keep please take care, but consider running
cd parallella-fpga
source revertlocalchanges.shBefore you run updatesubmodules.sh to update and get the latest versions of the git submodules.
You may wish to change branch. For example parallella-elink-redesign branch contains a sample yocto layer. To make this process easy run the following from the parallella folder:
$ git fetch --all
$ git checkout parallella-elink-redesign
$ git submodule update
$ source ./updatesubmodules.shYocto Troubleshooting notes - Troubleshooting notes
Vivado Troubleshooting notes - TODO
Instructions for contributors - Instructions for contributors
- TODO instructions for building the examples
- TODO oh yes need to add / create the examples!
- TODO instructions for adding new parts from the Analog Devices libraries