gpdk045

45 nm StrongARM comparator with static decision capture, PVT, offset, noise, kickback, load and timing characterization.

Designed and simulated ultra low-voltage, low-power CMOS 5:2 compressors in Cadence Virtuoso, based on Figure 13 from the referenced IEEE paper. Focused on optimizing power, delay, and area for efficient high-speed arithmetic circuits used in VLSI and DSP applications.