Implementation of the Wave-U-Net for audio source separation
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Updated
Mar 24, 2023 - Python
Implementation of the Wave-U-Net for audio source separation
Problem Agnostic Speech Encoder
Scripts for M-LARGE training and analysis
Audio input -> real-time analysis -> OSC output. Takes in real-time audio, does feature extraction using smart algorithms then sends out OSC to be used in other programs.
A GUI to draw your own waveform in the time or frequency domain and play with a MIDI keyboard.
Pulse wave analysis and representation learning methods using FlowEHealth's patented sensing technology.
Audio visualization tool for generating detailed spectrograms from FLAC files, featuring customizable parameters and zoom functionality for precise audio analysis
A deep learning framework for estimating battery State of Charge (SoC) using ultrasonic waveforms and waveform images. This repository includes spectrogram/image generation, multimodal neural network models, and evaluation tools developed at WMG in collaboration with Imperial College London.
Gate-level implementation of a 2-to-1 multiplexer using Verilog, complete with a testbench, truth table validation, and waveform analysis for beginners in digital logic design.
Gate-level implementation of a half-subtractor using Verilog, featuring a comprehensive testbench, truth table validation, and waveform analysis for beginners in digital design.
This repository contains a 32-bit Arithmetic Logic Unit (ALU) fully verified using a Universal Verification Methodology (UVM) environment written in SystemVerilog.
Eridian to English Translator as described in Andy Weirs 'Project Hail Mary'
This project implements a basic McCulloch–Pitts artificial neuron in Verilog. The current version supports two binary inputs and a programmable threshold, allowing it to emulate simple logic functions such as AND and OR ⚡.
Simulate and analyze fundamental logic gates using Icarus Verilog and GTKWave. This project provides a modular Verilog implementation and a comprehensive testbench for precise validation, offering valuable insights into digital design workflows for VLSI professionals.
Digital waveform and protocol reverse engineering toolkit with IEEE-compliant measurements for oscilloscope, logic analyzer, and network capture analysis
Kevin Macon's trapezoidal filtering code for waveform analysis out of digitizers. And helpful tidbits added by me.
Gate-level implementation of a full-adder using Verilog, complete with a testbench, truth table validation, and waveform analysis for beginners in digital logic design.
My academic research project to determine midline shift in acute intracranial events using analysis of bilateral supraorbital PPG waveforms.
A compact Verilog project implementing a half-adder with gate-level modeling, featuring a detailed testbench for functional verification and simulation.
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