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Fix bugs in IR generation - #8

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writemorecode merged 6 commits into
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bugs/ir_generation
Feb 10, 2026
Merged

Fix bugs in IR generation#8
writemorecode merged 6 commits into
mainfrom
bugs/ir_generation

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Bug: MethodCallNode and MethodCallWithoutArgumentsNode used only type info for the receiver and never generated receiver IR. This dropped side effects and broke chained calls in cfg.dot. Also the printed call arity included an implicit receiver that is never emitted as a param, so call metadata was inconsistent.\n\nFix: generate IR for the receiver before arguments and make the printed arity match emitted params.
Bug: ArrayAccessNode and ArrayLengthNode pulled the array name from node.value instead of evaluating the array expression. This produced malformed IR for cases like new int[3][0] and new int[3].length, and skipped array-expression side effects.\n\nFix: call array->generateIR(...) and use its operand for array access and length TAC.
Bug: AndNode/OrNode eagerly evaluated both operands and emitted boolean TAC, violating short-circuit semantics. This could execute RHS effects or faults even when LHS decides the result.\n\nFix: generate explicit control-flow blocks for RHS evaluation and true/false assignment, then join with the computed temporary boolean.
Bug: IfElseNode wired join edges from the initial true/false blocks instead of the actual blocks active after generating each branch body. With nested control flow this could orphan the outer join block from CFG traversal and bytecode generation.\n\nFix: set branch-to-join edges from graph.getCurrentBlock() after each branch body is generated. Also removed an incorrect while-edge assignment that rewired the preheader instead of the loop body exit.
Bug: CondJumpTac emitted bytecode by pushing the stringified lhs field. Literal conditions like true/false became LOAD operations on variable names ('1'/'0') instead of constants.\n\nFix: use lhsOp when emitting CJMP so constants and variables are encoded correctly.
Bug: bytecode generation appended STOP only to the main entry block. When control jumped into other blocks, execution could reach a block end with no instruction and crash the VM.\n\nFix: after generating main bytecode, traverse reachable CFG blocks and append STOP to leaf blocks (no true/false exits).
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writemorecode merged commit b28c68c into main Feb 10, 2026
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writemorecode deleted the bugs/ir_generation branch February 11, 2026 09:58
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