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fix RISC-V LMUL variant adaptation - #4

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anthony-zy wants to merge 4 commits into
zte_glibc-2.38from
mem-asm
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anthony-zy wants to merge 4 commits into
zte_glibc-2.38from
mem-asm

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Fix glibc adaptation for different LMUL settings on RISC-V.

Background:

  • RVV vector functions showed inconsistent behavior across LMUL variants.
  • Some code paths did not correctly handle LMUL changes, leading to
    incorrect results or degraded performance.

Changes:

  • Adjust macros and implementation to properly support multiple LMUL
    configurations.
  • Ensure correctness while keeping other architectures unaffected.

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