Skip to content

[codex] Encode PTO v0.57 tile blocks in the Linx compiler #29

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
zhoubot merged 4 commits into from
Jul 1, 2026
Merged

[codex] Encode PTO v0.57 tile blocks in the Linx compiler #29

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
4 commits
Select commit Hold shift + click to select a range
5637310
Encode PTO v0.57 tile blocks in the Linx compiler
Jul 1, 2026
b89597b
Keep v0.57 tile lowering aligned with reviewed contracts
Jul 1, 2026
d53328d
Lock v0.57 TileReg descriptor id coverage
Jul 1, 2026
7035a42
Canonicalize v0.57 tile references as direct Tn ids
Jul 1, 2026
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
5 changes: 5 additions & 0 deletions clang/include/clang/Basic/BuiltinsLinxISA.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -23,11 +23,16 @@ let Attributes = [NoThrow] in {
// PR4/PR5 strict tile surfaces.
def tile_tload : LinxISABuiltin<"_Vector<1024, int>(void const *, _Constant unsigned int, _Constant unsigned int, _Constant long long int, _Constant long long int, _Constant long long int, _Constant long long int)">;
def tile_tstore : LinxISABuiltin<"void(void *, _Vector<1024, int>, _Constant unsigned int, _Constant unsigned int, _Constant long long int, _Constant long long int, _Constant long long int, _Constant long long int)">;
def tile_mgather : LinxISABuiltin<"_Vector<1024, int>(void const *, _Vector<1024, int>, _Constant unsigned int, _Constant unsigned int, _Constant long long int, _Constant long long int, _Constant long long int, _Constant long long int)">;
def tile_mscatter : LinxISABuiltin<"void(void *, _Vector<1024, int>, _Vector<1024, int>, _Constant unsigned int, _Constant unsigned int, _Constant long long int, _Constant long long int, _Constant long long int, _Constant long long int)">;
def tile_tmov : LinxISABuiltin<"_Vector<1024, int>(_Vector<1024, int>, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int, _Constant long long int, _Constant unsigned int)">;
def tile_tinsert : LinxISABuiltin<"_Vector<1024, int>(_Vector<1024, int>, _Vector<1024, int>, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int, long long int)">;
def tile_ttrans : LinxISABuiltin<"_Vector<1024, int>(_Vector<1024, int>, _Vector<1024, int>, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int)">;

def cube_acccvt : LinxISABuiltin<"_Vector<1024, int>(_Vector<1024, int>, _Constant unsigned int, _Constant unsigned int, _Constant long long int, _Constant long long int)">;
def tepl_unary : LinxISABuiltin<"_Vector<1024, int>(_Vector<1024, int>, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int)">;
def tepl_binary : LinxISABuiltin<"_Vector<1024, int>(_Vector<1024, int>, _Vector<1024, int>, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int)">;
def tepl_ternary : LinxISABuiltin<"_Vector<1024, int>(_Vector<1024, int>, _Vector<1024, int>, _Vector<1024, int>, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int)">;
def tepl_binary_scalar : LinxISABuiltin<"_Vector<1024, int>(_Vector<1024, int>, long long int, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int)">;
def tepl_splat : LinxISABuiltin<"_Vector<1024, int>(long long int, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int, _Constant unsigned int)">;

Expand Down
4 changes: 4 additions & 0 deletions clang/include/clang/Options/Options.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -5095,6 +5095,10 @@ def mqdsp6_compat : Flag<["-"], "mqdsp6-compat">, Group<m_Group>,
MarshallingInfoFlag<LangOpts<"HexagonQdsp6Compat">>;
def m64 : Flag<["-"], "m64">, Group<m_Group>, Flags<[NoXarchOption]>,
Visibility<[ClangOption, CLOption, DXCOption, FlangOption]>;
def mlxbc : Flag<["-"], "mlxbc">, Group<m_Group>,
Flags<[NoXarchOption, TargetSpecific]>,
Visibility<[ClangOption, CLOption]>,
HelpText<"Select the Linx block ISA bare-metal target">;
def maix64 : Flag<["-"], "maix64">, Group<m_Group>, Flags<[NoXarchOption]>,
Visibility<[FlangOption]>;
def mx32 : Flag<["-"], "mx32">, Group<m_Group>, Flags<[NoXarchOption]>,
Expand Down
9 changes: 9 additions & 0 deletions clang/lib/Basic/Targets/LinxISA.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -73,8 +73,17 @@ bool LinxISATargetInfo::validateAsmConstraint(
// e - even register (for paired registers)
// z - zero register (r0)
// Z - first special register (ra/r10)
// Tr - tile register

switch (Name[0]) {
case 'T': {
if (Name[1] == 'r') {
Info.setAllowsRegister();
Name++;
return true;
}
return false;
}
case 'r': {
// General purpose register
Info.setAllowsRegister();
Expand Down
82 changes: 82 additions & 0 deletions clang/lib/CodeGen/TargetBuiltins/LinxISA.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,42 @@ llvm::Value *CodeGenFunction::EmitLinxISABuiltinExpr(unsigned BuiltinID,
{Base, Tile, DType, Layout, LB0, LB1, Size,
Stride});
}
case LinxISA::BI__builtin_linx_tile_mgather: {
llvm::Value *Base = EmitScalarExpr(E->getArg(0));
llvm::Value *Index = EmitScalarExpr(E->getArg(1));
llvm::Value *Size = castToI32(EmitScalarExpr(E->getArg(2)));
llvm::Value *DType = castToI32(EmitScalarExpr(E->getArg(3)));
llvm::Value *Layout = castToI32(EmitScalarExpr(E->getArg(4)));
llvm::Value *LB0 = castToI32(EmitScalarExpr(E->getArg(5)));
llvm::Value *LB1 = castToI32(EmitScalarExpr(E->getArg(6)));
llvm::Value *Stride = castToI64(EmitScalarExpr(E->getArg(7)));

llvm::Type *TileTy = ConvertType(E->getType());
llvm::Function *F =
CGM.getIntrinsic(llvm::Intrinsic::linx_tma_mgather_desc, {TileTy});
return Builder.CreateCall(F,
{Base, Index, DType, Layout, LB0, LB1, Size,
Stride},
"linx.tile.mgather");
}
case LinxISA::BI__builtin_linx_tile_mscatter: {
llvm::Value *Base = EmitScalarExpr(E->getArg(0));
llvm::Value *Tile = EmitScalarExpr(E->getArg(1));
llvm::Value *Index = EmitScalarExpr(E->getArg(2));
llvm::Value *Size = castToI32(EmitScalarExpr(E->getArg(3)));
llvm::Value *DType = castToI32(EmitScalarExpr(E->getArg(4)));
llvm::Value *Layout = castToI32(EmitScalarExpr(E->getArg(5)));
llvm::Value *LB0 = castToI32(EmitScalarExpr(E->getArg(6)));
llvm::Value *LB1 = castToI32(EmitScalarExpr(E->getArg(7)));
llvm::Value *Stride = castToI64(EmitScalarExpr(E->getArg(8)));

llvm::Function *F =
CGM.getIntrinsic(llvm::Intrinsic::linx_tma_mscatter_desc,
{Tile->getType()});
return Builder.CreateCall(F,
{Base, Tile, Index, DType, Layout, LB0, LB1,
Size, Stride});
}
case LinxISA::BI__builtin_linx_tile_tmov: {
llvm::Value *Src = EmitScalarExpr(E->getArg(0));
llvm::Value *Mode = castToI32(EmitScalarExpr(E->getArg(1)));
Expand All @@ -73,6 +109,39 @@ llvm::Value *CodeGenFunction::EmitLinxISABuiltinExpr(unsigned BuiltinID,
return Builder.CreateCall(F, {Src, Mode, Size, DType, Layout, HasLayout},
"linx.tile.tmov");
}
case LinxISA::BI__builtin_linx_tile_tinsert: {
llvm::Value *Dst = EmitScalarExpr(E->getArg(0));
llvm::Value *Src = EmitScalarExpr(E->getArg(1));
llvm::Value *Size = castToI32(EmitScalarExpr(E->getArg(2)));
llvm::Value *DType = castToI32(EmitScalarExpr(E->getArg(3)));
llvm::Value *DstRows = castToI32(EmitScalarExpr(E->getArg(4)));
llvm::Value *DstCols = castToI32(EmitScalarExpr(E->getArg(5)));
llvm::Value *SrcRows = castToI32(EmitScalarExpr(E->getArg(6)));
llvm::Value *SrcCols = castToI32(EmitScalarExpr(E->getArg(7)));
llvm::Value *Meta = castToI64(EmitScalarExpr(E->getArg(8)));

llvm::Function *F = CGM.getIntrinsic(
llvm::Intrinsic::linx_tile_tinsert_legacy, {Dst->getType()});
return Builder.CreateCall(F, {Dst, Src, Size, DType, DstRows, DstCols,
SrcRows, SrcCols, Meta},
"linx.tile.tinsert");
}
case LinxISA::BI__builtin_linx_tile_ttrans: {
llvm::Value *Src = EmitScalarExpr(E->getArg(0));
llvm::Value *Tmp = EmitScalarExpr(E->getArg(1));
llvm::Value *Size = castToI32(EmitScalarExpr(E->getArg(2)));
llvm::Value *DType = castToI32(EmitScalarExpr(E->getArg(3)));
llvm::Value *DstRows = castToI32(EmitScalarExpr(E->getArg(4)));
llvm::Value *DstCols = castToI32(EmitScalarExpr(E->getArg(5)));
llvm::Value *SrcRows = castToI32(EmitScalarExpr(E->getArg(6)));
llvm::Value *SrcCols = castToI32(EmitScalarExpr(E->getArg(7)));

llvm::Function *F = CGM.getIntrinsic(
llvm::Intrinsic::linx_tile_ttrans_legacy, {Src->getType()});
return Builder.CreateCall(F, {Src, Tmp, Size, DType, DstRows, DstCols,
SrcRows, SrcCols},
"linx.tile.ttrans");
}
case LinxISA::BI__builtin_linx_cube_mamulb: {
llvm::Value *A = EmitScalarExpr(E->getArg(0));
llvm::Value *B = EmitScalarExpr(E->getArg(1));
Expand Down Expand Up @@ -130,6 +199,19 @@ llvm::Value *CodeGenFunction::EmitLinxISABuiltinExpr(unsigned BuiltinID,
return Builder.CreateCall(F, {A, B, TileOp, Size, DType},
"linx.tepl.b");
}
case LinxISA::BI__builtin_linx_tepl_ternary: {
llvm::Value *A = EmitScalarExpr(E->getArg(0));
llvm::Value *B = EmitScalarExpr(E->getArg(1));
llvm::Value *C = EmitScalarExpr(E->getArg(2));
llvm::Value *TileOp = castToI32(EmitScalarExpr(E->getArg(3)));
llvm::Value *Size = castToI32(EmitScalarExpr(E->getArg(4)));
llvm::Value *DType = castToI32(EmitScalarExpr(E->getArg(5)));

llvm::Function *F = CGM.getIntrinsic(
llvm::Intrinsic::linx_tepl_ternary_legacy, {A->getType()});
return Builder.CreateCall(F, {A, B, C, TileOp, Size, DType},
"linx.tepl.t");
}
case LinxISA::BI__builtin_linx_tepl_binary_scalar: {
llvm::Value *A = EmitScalarExpr(E->getArg(0));
llvm::Value *Scalar = castToI64(EmitScalarExpr(E->getArg(1)));
Expand Down
4 changes: 4 additions & 0 deletions clang/lib/Driver/Driver.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -615,6 +615,10 @@ static llvm::Triple computeTargetTriple(const Driver &D,
// FIXME: Already done in Compilation *Driver::BuildCompilation
if (const Arg *A = Args.getLastArg(options::OPT_target))
TargetTriple = A->getValue();
else if (Arg *A = Args.getLastArg(options::OPT_mlxbc)) {
TargetTriple = "linx64-linx-none-elf";
A->claim();
}

llvm::Triple Target(llvm::Triple::normalize(TargetTriple));

Expand Down
1 change: 1 addition & 0 deletions clang/lib/Driver/ToolChains/Clang.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1781,6 +1781,7 @@ void Clang::AddLinxISATargetArgs(const ArgList &Args,
// ToolChains/Arch/LinxISA.cpp.
(void)Args.getLastArg(options::OPT_mcpu_EQ);
(void)Args.getLastArg(options::OPT_march_EQ);
(void)Args.getLastArg(options::OPT_mlxbc);

if (const Arg *A = Args.getLastArg(options::OPT_mtune_EQ)) {
CmdArgs.push_back("-tune-cpu");
Expand Down
15 changes: 15 additions & 0 deletions clang/test/CodeGen/linxisa-builtins.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,21 @@ tile_i32 test_tile_tmov(tile_i32 src) {
// CHECK-LABEL: define{{.*}} <1024 x i32> @test_tile_tmov
// CHECK: call <1024 x i32> @llvm.linx.tile.tmov.legacy

tile_i32 test_tile_tinsert(tile_i32 dst, tile_i32 src, long long meta) {
return __builtin_linx_tile_tinsert(dst, src, 8u, 1u, 16u, 32u, 16u, 8u,
meta);
}

// CHECK-LABEL: define{{.*}} <1024 x i32> @test_tile_tinsert
// CHECK: call <1024 x i32> @llvm.linx.tile.tinsert.legacy

tile_i32 test_tile_ttrans(tile_i32 src, tile_i32 tmp) {
return __builtin_linx_tile_ttrans(src, tmp, 8u, 1u, 32u, 16u, 16u, 32u);
}

// CHECK-LABEL: define{{.*}} <1024 x i32> @test_tile_ttrans
// CHECK: call <1024 x i32> @llvm.linx.tile.ttrans.legacy

tile_i32 test_cube_mamulb(tile_i32 a, tile_i32 b) {
return __builtin_linx_cube_mamulb(a, b, 4u, 4u, 4u);
}
Expand Down
16 changes: 16 additions & 0 deletions clang/test/Driver/linx-mlxbc.c
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,16 @@
// Verify the legacy Linx benchmark driver flag selects the v0.57 Linx target.
//
// RUN: %clang -mlxbc -### -c %s 2>&1 | FileCheck %s --check-prefix=MLXBC
// RUN: %clang -mlxbc --target=linx32-unknown-linux-gnu -### -c %s 2>&1 | FileCheck %s --check-prefix=EXPLICIT

// MLXBC: Target: linx64-linx-none-elf
// MLXBC: "-triple" "linx64-linx-none-elf"
// MLXBC: "-target-feature" "+lnx-s32"
// MLXBC: "-target-feature" "+lnx-s64"

// EXPLICIT: Target: linx32-unknown-linux-gnu
// EXPLICIT: "-triple" "linx32-unknown-linux-gnu"
// EXPLICIT: "-target-feature" "+lnx-s32"
// EXPLICIT-NOT: "-target-feature" "+lnx-s64"

int linx_mlxbc_driver_test(void) { return 0; }
91 changes: 87 additions & 4 deletions llvm/include/llvm/IR/IntrinsicsLinx.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ let TargetPrefix = "linx" in {
// -------------------------------------------------------------------------
// Tile block intrinsics (TAU) - PR4 surface
//
// Preferred strict-v0.3 frontend surface:
// Preferred LinxISA v0.57 frontend surface:
// llvm.linx.tile.tload/tstore/tmov
//
// Type contract:
Expand Down Expand Up @@ -71,6 +71,35 @@ let TargetPrefix = "linx" in {
ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>,
ImmArg<ArgIndex<5>>]>;

// %linx.tile @llvm.linx.tile.tinsert(%linx.tile dst, %linx.tile src,
// i32 immSizeCode, i32 immDType,
// i32 immDstRows, i32 immDstCols,
// i32 immSrcRows, i32 immSrcCols,
// i64 meta)
def int_linx_tile_tinsert :
Intrinsic<[llvm_linx_tile_ty],
[llvm_linx_tile_ty, llvm_linx_tile_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i64_ty],
[IntrNoMem, IntrHasSideEffects,
ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>,
ImmArg<ArgIndex<6>>, ImmArg<ArgIndex<7>>]>;

// %linx.tile @llvm.linx.tile.ttrans(%linx.tile src, %linx.tile tmp,
// i32 immSizeCode, i32 immDType,
// i32 immDstRows, i32 immDstCols,
// i32 immSrcRows, i32 immSrcCols)
def int_linx_tile_ttrans :
Intrinsic<[llvm_linx_tile_ty],
[llvm_linx_tile_ty, llvm_linx_tile_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty],
[IntrNoMem, IntrHasSideEffects,
ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>,
ImmArg<ArgIndex<6>>, ImmArg<ArgIndex<7>>]>;

// %linx.tile @llvm.linx.cube.mamulb(%linx.tile a, %linx.tile b,
// i32 immM, i32 immN, i32 immK)
def int_linx_cube_mamulb :
Expand Down Expand Up @@ -139,11 +168,22 @@ let TargetPrefix = "linx" in {
ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
ImmArg<ArgIndex<4>>]>;

// %linx.tile @llvm.linx.tepl.ternary(%linx.tile a, %linx.tile b,
// %linx.tile c, i32 immTileOp10,
// i32 immSizeCode, i32 immDType)
def int_linx_tepl_ternary :
Intrinsic<[llvm_linx_tile_ty],
[llvm_linx_tile_ty, llvm_linx_tile_ty, llvm_linx_tile_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoMem, IntrHasSideEffects,
ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>,
ImmArg<ArgIndex<5>>]>;

// %linx.tile @llvm.linx.tepl.binary.scalar(%linx.tile a, i64 scalar,
// i32 immTileOp10, i32 immSizeCode,
// i32 immDType, i32 immMode)
//
// Scalar TEPL mode extension for strict-v0.3:
// Scalar TEPL mode extension for LinxISA v0.57:
// - mode 1 = VS (tile,scalar)
def int_linx_tepl_binary_scalar :
Intrinsic<[llvm_linx_tile_ty],
Expand All @@ -157,7 +197,7 @@ let TargetPrefix = "linx" in {
// i32 immSizeCode, i32 immDType,
// i32 immMode)
//
// Scalar TEPL mode extension for strict-v0.3:
// Scalar TEPL mode extension for LinxISA v0.57:
// - mode 2 = SV (scalar->tile splat)
def int_linx_tepl_splat :
Intrinsic<[llvm_linx_tile_ty],
Expand Down Expand Up @@ -242,7 +282,7 @@ let TargetPrefix = "linx" in {
// Bring-up contract:
// - Executed as a decoupled BSTART.VPAR header that replays a single-lane
// vector body over LB0/LB1 dimensions.
// - Tile operands are bound via B.IOTI descriptors and accessed through TA/TB/TO.
// - Tile operands are bound via B.ITP/B.OTA descriptors and accessed through TA/TB/TO.
// - immSizeCode uses the same 2^(SizeCode+4) convention as TLOAD/TSTORE.
// -------------------------------------------------------------------------

Expand Down Expand Up @@ -284,6 +324,25 @@ let TargetPrefix = "linx" in {
ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>,
ImmArg<ArgIndex<5>>, ImmArg<ArgIndex<6>>,
ImmArg<ArgIndex<7>>]>;
def int_linx_tma_mgather_desc :
Intrinsic<[llvm_anyvector_ty],
[llvm_ptr_ty, LLVMMatchType<0>, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i64_ty],
[IntrReadMem, IntrArgMemOnly,
NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<2>>,
ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>,
ImmArg<ArgIndex<5>>, ImmArg<ArgIndex<6>>,
ImmArg<ArgIndex<7>>]>;
def int_linx_tma_mscatter_desc :
Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty, LLVMMatchType<0>,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i64_ty],
[IntrWriteMem, IntrArgMemOnly,
NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<3>>,
ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>,
ImmArg<ArgIndex<6>>, ImmArg<ArgIndex<7>>,
ImmArg<ArgIndex<8>>]>;

// Legacy vector TMOV bridge.
def int_linx_tile_tmov_legacy :
Expand All @@ -294,6 +353,23 @@ let TargetPrefix = "linx" in {
ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>,
ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>,
ImmArg<ArgIndex<5>>]>;
def int_linx_tile_tinsert_legacy :
Intrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
llvm_i64_ty],
[IntrNoMem, IntrHasSideEffects,
ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>,
ImmArg<ArgIndex<6>>, ImmArg<ArgIndex<7>>]>;
def int_linx_tile_ttrans_legacy :
Intrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoMem, IntrHasSideEffects,
ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>,
ImmArg<ArgIndex<6>>, ImmArg<ArgIndex<7>>]>;

// Legacy CUBE forms.
def int_linx_cube_mamulb_legacy :
Expand Down Expand Up @@ -332,6 +408,13 @@ let TargetPrefix = "linx" in {
[IntrNoMem, IntrHasSideEffects,
ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
ImmArg<ArgIndex<4>>]>;
def int_linx_tepl_ternary_legacy :
Intrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoMem, IntrHasSideEffects,
ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>,
ImmArg<ArgIndex<5>>]>;
def int_linx_tepl_binary_scalar_legacy :
Intrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
Expand Down
Loading