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QSGMII support #2

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QSGMII support #2

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fb0da5a
kernel: qca-uniphy: support QSGMII PHY mode
robimarko Mar 9, 2026
1599769
kernel: qca-ppe: support QSGMII PHY mode
robimarko Mar 9, 2026
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2 changes: 2 additions & 0 deletions package/kernel/qca-ppe/src/qca_ppe_main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -652,6 +652,8 @@ static void qca_ppe_phylink_get_caps(struct dsa_switch *ds, int port,
MAC_1000FD | MAC_100FD | MAC_10FD |
MAC_SYM_PAUSE | MAC_ASYM_PAUSE;

__set_bit(PHY_INTERFACE_MODE_QSGMII,
config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_PSGMII,
config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_SGMII,
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4 changes: 2 additions & 2 deletions package/kernel/qca-ppe/src/qualcomm,ipq-ppe.yaml
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Expand Up @@ -15,9 +15,9 @@ description: |
scheduling. It is driven as a DSA switch, using an EDMA network device as the
CPU port conduit and UNIPHY PCS instances for SerDes link management.

IPQ6018 provides 7 ports (CPU port 0, user ports 1-4 via PSGMII on uniphy0,
IPQ6018 provides 7 ports (CPU port 0, user ports 1-4 via QSGMII/PSGMII on uniphy0,
and port 5 via uniphy1). IPQ8074 provides 8 ports (CPU port 0, user ports
1-4 via PSGMII on uniphy0, and ports 5-6 via uniphy1/uniphy2).
1-4 via QSGMII/PSGMII on uniphy0, and ports 5-6 via uniphy1/uniphy2).

$ref: dsa.yaml#

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9 changes: 8 additions & 1 deletion package/kernel/qca-uniphy/src/qca_uniphy.c
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Expand Up @@ -208,6 +208,7 @@ qca_uniphy_pcs_inband_caps(struct phylink_pcs *pcs,
phy_interface_t interface)
{
switch (interface) {
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_PSGMII:
case PHY_INTERFACE_MODE_SGMII:
return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
Expand Down Expand Up @@ -275,6 +276,7 @@ static int qca_uniphy_pcs_config(struct phylink_pcs *pcs,
case PHY_INTERFACE_MODE_PSGMII:
return qca_uniphy_psgmii_calibrate(uniphy);
case PHY_INTERFACE_MODE_SGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_2500BASEX:
if (interface == uniphy->current_mode)
return 0;
Expand All @@ -284,7 +286,12 @@ static int qca_uniphy_pcs_config(struct phylink_pcs *pcs,
UNIPHY_MISC2_SGMII,
UNIPHY_SG_MODE | UNIPHY_SG_AUTONEG,
125000000);
else
else if (interface == PHY_INTERFACE_MODE_QSGMII)
qca_uniphy_sgmii_setup(uniphy,
UNIPHY_MISC2_SGMII,
UNIPHY_CH0_QSGMII_SGMII | UNIPHY_SG_AUTONEG,
125000000);
else if (interface == PHY_INTERFACE_MODE_2500BASEX)
qca_uniphy_sgmii_setup(uniphy,
UNIPHY_MISC2_SGMIIPLUS,
UNIPHY_SGPLUS_MODE | UNIPHY_SG_AUTONEG,
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1 change: 1 addition & 0 deletions package/kernel/qca-uniphy/src/qca_uniphy.h
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Expand Up @@ -18,6 +18,7 @@
#define UNIPHY_MISC2_SGMIIPLUS 0x50

#define UNIPHY_MODE_CTRL 0x46c
#define UNIPHY_CH0_QSGMII_SGMII BIT(8)
#define UNIPHY_CH0_PSGMII_QSGMII BIT(9)
#define UNIPHY_SG_MODE BIT(10)
#define UNIPHY_SGPLUS_MODE BIT(11)
Expand Down