feat(xpu): add Lunar Lake training benchmarks and runtime setup - #16
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marksverdhei wants to merge 31 commits into
Draft
marksverdhei wants to merge 31 commits into
marksverdhei wants to merge 31 commits into
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Adds the pinned container, source-build workflow, and training-path diagnostic used to establish the XPU benchmark environment. Authored with Codex.
Adds an opt-in, profiled Inductor path for fixed-shape Intel XPU training and compile-friendly Qwen 3.5 primitives with backward coverage. The stock Inductor baseline remains unchanged.\n\nAuthored with Codex.
Intel setvars.sh references optional environment variables and cannot run under nounset. Restore strict mode immediately after sourcing it. Authored with Codex.
Pins a Transformers revision that recognizes the published architecture and adds the gated RMSNorm compilation path verified against a real hybrid Qwen model with exact forward and backward parity.\n\nAuthored with Codex.
Only source the pinned compiler environment for fork builds so official wheels load their matching bundled SYCL runtime. Authored with Codex.
Avoid overriding the matching SYCL runtime bundled with official XPU wheels. Authored with Codex.
The default foreach optimizer loses the Level Zero device on this hardware. Exercise and record the supported single-tensor path in the environment gate. Authored with Codex.
Use capturable single-tensor AdamW so scalar counters and moment tensors remain resident on the accelerator. Authored with Codex.
Adds a persistent plain-HTTP Hugging Face cache and offline asset validator, and removes a projection-weight optimization that bypassed LoRA wrappers during published-checkpoint validation.\n\nAuthored with Codex.
Disable tests and distributed transports and avoid recursively fetching disabled accelerator dependencies for the benchmark runtime. Authored with Codex.
Fetch Kineto's pinned dynolog source without recursively materializing unrelated accelerator submodules. Authored with Codex.
This reverts commit 8d3c165.
This reverts commit 33b401d.
This was referenced Sep 11, 2026
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Add a reproducible Intel Lunar Lake XPU training environment, shared measurement harness, ConvNeXt training workload, and Qwen 3.5 SFT workload. Include the opt-in HT Qwen backend, real-model asset preparation, environment diagnostics, and pinned oneDNN build integration.
This draft preserves the 31 commits currently accumulated on local
htwithout updating remoteht. Review the environment and harness first, then workloads and optimization paths. The final state disables the unsafe native XPU layer-norm benchmark path after the experimental rewrites were reverted.The six
agent/xpu-*preservation drafts contain overlapping development histories and earlier variants. This combined branch is the primary review candidate; those drafts should not be merged independently without reconciling their overlap.Validation: existing commits include workload, harness, backend, and layer-norm tests. No build, benchmark, or test suite was rerun for this publication-only operation. Local checkout inspection found an untracked
third_party/torch-xpu-ops/checkout and a flash-attention nested submodule pointing at/workspace/.git/...; neither is included in this branch. Resolve checkout reproducibility and complete XPU validation before marking ready.Draft prepared with Codex to preserve existing local work; no new implementation commits.