Fix SYNC_MANAGER_CONTROL bitmasks for operation mode and direction

[trns1997]

From Section II Register Description:

• SYNC_MANAGER_CONTROL_OPERATION_MODE_MASK was 0x01 — bit 0 is always 0 for all valid modes (buffered=00, mailbox=10), so the check was a no-op.
• SYNC_MANAGER_CONTROL_DIRECTION_MASK was 0x02 — bit 1 is the MSB of the operation mode field, not direction, so isSmValid() was accidentally checking mode (partially) while never checking direction at all.

We've been always in an unconditionally true case, which is why everything works its just that we could have slaves that has its SMs configured incorrectly and isSmValid() would have returned true.

• Test on hardware

[github-actions]

File	Coverage	Lines	Branches
All files	78%	81%	75%	✅
lib/include/kickcat/Error.h	91%	100%	83%	✅
lib/include/kickcat/SBufQueue.h	80%	98%	63%	✅
lib/master/src/Bus.cc	90%	92%	89%	✅
lib/master/src/CoE.cc	61%	71%	51%	❌
lib/master/src/Link.cc	98%	100%	97%	✅
lib/master/src/MailboxSequencer.cc	97%	100%	94%	✅
lib/master/src/MasterOD.cc	99%	98%	100%	✅
lib/master/src/Prints.cc	95%	95%	95%	✅
lib/master/src/Slave.cc	21%	39%	3%	❌
lib/master/src/dc.cc	0%	0%	0%	❌
lib/slave/src/AbstractESC.cc	92%	100%	84%	✅
lib/slave/src/AbstractEmulatedEEPROM.cc	0%	0%	0%	❌
lib/slave/src/ESMStates.cc	96%	98%	94%	✅
lib/slave/src/ESM.cc	95%	100%	90%	✅
lib/slave/src/PDO.cc	92%	97%	88%	✅
lib/slave/src/ESC/EmulatedESC.cc	57%	63%	51%	❌
lib/slave/src/ESC/Lan9252.cc	0%	0%	0%	❌
lib/src/Frame.cc	98%	100%	97%	✅
lib/src/Mailbox.cc	90%	94%	86%	✅
lib/src/SIIParser.cc	40%	50%	30%	❌
lib/src/protocol.cc	94%	92%	96%	✅
lib/src/CoE/EsiParser.cc	93%	95%	90%	✅
lib/src/CoE/OD.cc	98%	98%	98%	✅
lib/src/CoE/protocol.cc	93%	93%	94%	✅
lib/src/CoE/CiA/DS402/StateMachine.cc	93%	94%	92%	✅
lib/src/CoE/mailbox/request.cc	80%	84%	76%	✅
lib/src/CoE/mailbox/response.cc	93%	97%	88%	✅
lib/src/EoE/protocol.cc	0%	0%	0%	❌

Minimum allowed coverage is 75%

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