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Hardware implementation of a Double Pulse Test (DPT) platform for SiC MOSFETs. Features LTspice parasitic modeling, ANSYS Q3D extraction, and a novel 4-layer Vertical Multi-Loop PCB layout that minimizes parasitic inductance and switching losses for high-frequency wide-bandgap applications.
This python script converts any speed/torque (or current/voltage) profile of an electric drive into thermal power cycles, and then quantifies the lifetime damage produced by that profile.
Supporting data for T. Reiter, M. Niendorf, J. Schapdick, "A Method for Individual Switching Energy Extraction in Si/SiC Fusion Switches", ECCE Europe, 2026 (planned publication)